Searching for authors named "Srinivas Devadas" – sorted by Relevance.

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96 documents found, showing 1 through 10. Next 10 →

Techniques for the Power Estimation of Sequential Logic Circuits Under User-Specified Input Sequences and Programs
by José Monteiro, Srinivas Devadas — 1994 — IEEE Transactions on VLSI Systems
…We describe an approach to estimate the average power dissipation in sequential logic circuits under user-specified input sequences or programs. This approach will aid the design of programmable controllers or processors, by enabling the estimation of the power dissipated when the controller or proc…
Cited by 28 (6 self) – Add To MetaCart

A Methodology for Accurate Performance Evaluation in Architecture Exploration
by George Hadjiyiannis, Srinivas Devadas — 1999 — In In Proceedings of the Design Automation Conference (DAC 99
…We present a system that automatically generates a cycle-accurate and bit-true Instruction Level Simulator (ILS) and a hardware implementation model given a description of a target processor. An ILS can be used to obtain a cycle count for a given program running on the target architecture, while t…
Cited by 13 (0 self) – Add To MetaCart

Synthesis of Robust Delay-Fault Testable Circuits: Theory
by Srinivas Devadas, Kurt Keutzer — 1992 — IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
…Correct operation of synchronous digital circuits requires propagation delays of all sensitizable paths in the circuit to be smaller than a specified limit. Physical defects and processing variations in integrated circuits can affect the temporal behavior of a circuit without altering the logical …
Cited by 11 (1 self) – Add To MetaCart

Solving Covering Problems Using LPR-Based Lower Bounds
by Stan Liao, Srinivas Devadas — 1996 — In Proceedings of the ACM/IEEE Design Automation Conference
…Unate and binate covering problems are a special class of general integer linear programming problems with which several problems in logic synthesis, such as two-level logic minimization and technology mapping, are formulated. Previous branch-and-bound methods for exactly solving these problems use …
Cited by 28 (1 self) – Add To MetaCart

Techniques for Accurate Performance Evaluation in Architecture Exploration
by George Hadjiyiannis, Srinivas Devadas — 2002 — IEEE Transactions on Very Large Scale Integration (VLSI) Systems
…We present a system that automatically generates a cycle-accurate and bit-true Instruction Level Simulator (ILS) and a hardware implementation model given a description of a target processor. An ILS can be used to obtain a cycle count for a given program running on the target architecture, while the…
Cited by 4 (0 self) – Add To MetaCart

Synthesis of Hazard-Free Multilevel Logic Under Multiple-Input Changes from Binary Decision Diagrams
by Bill Lin, Srinivas Devadas — 1995 — IEEE Transactions on CAD
…We describe a new method for directly synthesizing a hazard-free multilevel logic implementation from a given logic specification. The method is based on free/ordered Binary Decision Diagrams (BDD's), and is naturally applicable to multiple-output logic functions. Given an incompletelyspecified (mul…
Cited by 16 (6 self) – Add To MetaCart

Instruction Selection, Resource Allocation, and Scheduling in the AVIV Retargetable Code Generator
by Silvina Hanono, Srinivas Devadas — 1998 — in the AVIV retargetable code generator. 35th Design Automation Conference (DAC
…The AVIV retargetable code generator produces optimized machine code for target processors with different instruction set architectures. AVIV optimizes for minimum code size. Retargetable code generation requires the development of heuristic algorithms for instruction selection, resource allocation…
Cited by 44 (3 self) – Add To MetaCart

A Low Power, Low Bandwidth Protocol for Remote Wireless Terminals
by George Hadjiyiannis, Anantha Chandrakasan, Srinivas Devadas — 1998 — in Proc. IEEE Global Telecommunications Conf
…We present a low bandwidth protocol for wireless multi-media terminals targeted towards low power consumption on the terminal side. With the widespread use of portable computing devices, low power has become a major design criterion. One way of minimizing power consumption is to perform all tasks, o…
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Estimation of Power Dissipation in CMOS
by Srinivas Devadas, Kurt Keutzer, Jacob White
…circuits has made power dissipation an important design consideration. However, power dissipation in a logic cir- cuit is a function of the input vector or vector sequence applied. This makes accurate estimation of worst-case power dissipation extremely difficult, since the number of input sequences…
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Physical Random Functions
by Srinivas Devadas, Blaise L. P. Gassend, Blaise L. P. Gassend — 2003 — In Proceedings of the 18th Annual Computer Security Conference
…In general, secure protocols assume that participants are able to maintain secret key information. In practice, this assumption is often incorrect as an increasing number of devices are vulnerable to physical attacks. Typical examples of vulnerable devices are smartcards and Automated Teller Machine…
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