Searching for authors named "Sreejit Chakravarty" – sorted by Relevance.
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A Study of Theoretical Issues in the Synthesis of Delay Fault Testable Circuits
- A Study of Theoretical Issues in the Synthesis of Delay Fault Testable Circuits 1 Sreejit
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A Sampling Technique for Diagnostic Fault Simulation
- A Sampling Technique for Diagnostic Fault Simulation 1 Sreejit Chakravarty 226 Bell Hall Dept
- Cited by 2 (1 self) – Add To MetaCart
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A Dynamic Diagnostic Test Generation System for I_DDQ Measurement Based Diagnosis of Bridging FAults
- Faults Yiming Gong and Sreejit Chakravarty Department of Computer Science State University of New York
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A Diagnosis Algorithm for Bridging Faults in Combinational Circuits
- A Diagnosis Algorithm for Bridging Faults in Combinational Circuits Yiming Gong Sreejit
- Cited by 1 (0 self) – Add To MetaCart
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Stress Tests for Dynamic Burn-in of Full Scan Circuits
- Stress Tests for Dynamic Burn-in of Full Scan Circuits Vinay P. Dabholkar Sreejit Chakravarty
- Cited by 1 (1 self) – Add To MetaCart
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Voting Model Based Diagnosis of Bridging Faults in Combinational Circuits
- Voting Model Based Diagnosis of Bridging Faults in Combinational Circuits Sreejit Chakravarty
- Cited by 1 (1 self) – Add To MetaCart
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Minimizing Power Dissipation in Scan Circuits During Test Application
- Minimizing Power Dissipation in Scan Circuits During Test Application Sreejit Chakravarty
- Cited by 12 (1 self) – Add To MetaCart
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Measurement Based Diagnosis of Bridging Faults in Full Scan Circuits
- I DDQ Measurement Based Diagnosis of Bridging Faults in Full Scan Circuits Sreejit Chakravarty y
- Cited by 8 (5 self) – Add To MetaCart
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Measurement Based Analysis of Bridging Faults in CMOS Circuits
- On I DDQ Measurement Based Analysis of Bridging Faults in CMOS Circuits 1 Sreejit Chakravarty
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Defect-Based Test: A Key Enabler for Successful Migration to Structural Test
- Corp. Sreejit Chakravarty, MPG Test Technology, Intel Corp. Praveen Parvathala, MPG Test Technology
- Cited by 9 (0 self) – Add To MetaCart

