Searching for authors named "Soumitra Bose" – sorted by Relevance.
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Automated Modeling of Custom Digital Circuits for Test
- , the modeling algorithms presented in this paper analyze each chan- nel connected component Soumitra Bose
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Abstract Delay Fault Simulation with Bounded Gate Delay Model
- Abstract Delay Fault Simulation with Bounded Gate Delay Model Soumitra Bose * Design Technology
- Cited by 4 (2 self) – Add To MetaCart
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Estimating Stuck Fault Coverage in Sequential Logic Using State Traversal and Entropy Analysis
- Soumitra Bose ∗ Vishwani D. Agrawal Design Technology, Intel Corp. Dept. of ECE, Auburn University Folsom
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Fault Coverage Estimation for Non-Random Functional Input Sequences
- Fault Coverage Estimation for Non-Random Functional Input Sequences Soumitra Bose Vishwani D
- Cited by 1 (1 self) – Add To MetaCart
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Delay Test Quality Evaluation using Bounded Gate Delays
- Delay Test Quality Evaluation Using Bounded Gate Delays Soumitra Bose Vishwani D. Agrawal Design
- Cited by 5 (3 self) – Add To MetaCart

