Searching for "Scalar Operand Networks." – sorted by Relevance.

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15 documents found, showing 1 through 10. Next 10 →

Scalar Operand Networks
by Michael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal — 2005 — IEEE Transactions on Parallel and Distributed Systems
… properties of scalar operand networks (SONs), examines alternative ways of implementing them, and introduces…
Cited by 16 (0 self) – Add To MetaCart

Scalar Operand Networks: On-chip Interconnect for ILP in Partitioned Architectures
by Michael Taylor, Michael Bedford Taylor, Walter Lee, Saman Amarasinghe, Anant Agarwal — 2002 — In International Symposium on High Performance Computer Architecture
…Abstract Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architectures…
Cited by 35 (3 self) – Add To MetaCart

Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams
by Michael Bedford Taylor, Walter Lee, Jason Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matt Frank, Saman Amarasinghe, Anant Agarwal — 2004 — In ISCA
… the abstraction of a scalar operand network [45] that offers very low latency for scalar data transport…
Cited by 31 (5 self) – Add To MetaCart

Extending multicore architectures to exploit hybrid parallelism in single-thread applications
by Hongtao Zhong, Steven A. Lieberman, Scott A. Mahlke — 2007 — In Intl. Symp. on High-Performance Computer Architecture
…. First, it provides a dual-mode scalar operand network to enable efficient inter-core communication…
Cited by 12 (2 self) – Add To MetaCart

A Fast Parallel Reed-Solomon Decoder On a Reconfigurable Architecture
by Arezou Koohi, Nader Bagherzadeh, Chengzi Pan — IEEE CODES+ISSS’03
… that of transistor switching delay. This discrepancy requires a new philosophy on design of scalar operand network [9…
Cited by 2 (0 self) – Add To MetaCart

Extracting statistical loop-level parallelism using hardware-assisted recovery
by Steven A. Lieberman, Hongtao Zhong, Scott A. Mahlke — 2007
… network connects the cores in a 2-D mesh. Details about the transactional memory and the scalar operand…
Cited by 1 (1 self) – Add To MetaCart

Uncovering hidden loop level parallelism in sequential applications
by Hongtao Zhong, Mojtaba Mehrara, Steve Lieberman, Scott Mahlke — 2008 — In Proc. of the 14th International Symposium on High-Performance Computer Architecture
… and commits the speculative state. Second, a scalar operand network, similar to that in the Raw architecture…
Cited by 1 (1 self) – Add To MetaCart

Routed Inter-ALU Networks for ILP Scalability and Performance
by Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger — 2003
… for classifying these Inter-ALU Networks based on how operands are routed from producers to consumers. We…
Cited by 6 (2 self) – Add To MetaCart

Virtual circuit tree multicasting: A case for on-chip hardware multicast support
by Natalie Enright Jerger, Li-shiuan Peh, Mikko Lipasti — 2008 — in Proceedings of the International Symposium on Computer Architecture (ISCA-35
… multicast routing architecture. In some cases, such as architectures utilizing operand networks (e.g. RAW…
Cited by 5 (2 self) – Add To MetaCart

Power-driven Design of Router Microarchitectures in On-chip Networks
by Hangsheng Wang Li-Shiuan, Hangsheng Wang, Li-shiuan Peh, Sharad Malik — 2003
… characterization and analysis. In these fine-grained CMPs, whose networks are also named scalar operand networks…
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