Searching for authors named "Ronny Ronen" – sorted by Relevance.
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Selecting long atomic traces for high coverage
- + , Ronny Ronen * * Microprocessor Research Intel Labs (formerly MRL) Haifa, Israel {roni.rosner, micha
- Cited by 4 (0 self) – Add To MetaCart
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Filtering Techniques to Improve Trace-Cache Efficiency
- Filtering Techniques to Improve Trace-Cache Efficiency Roni Rosner, Avi Mendelson and Ronny Ronen
- Cited by 12 (1 self) – Add To MetaCart
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On Estimating Optimal Performance of CPU Dynamic Thermal Management
- , Avi Mendelson, Ronny Ronen, Dmitry Rudoy Microprocessor Research Intel Labs, Haifa, Israel {aviad.cohen,lev.finkelstein,avi.mendelson,ronny.ronen
- Cited by 7 (0 self) – Add To MetaCart
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A Novel Renaming Scheme to Exploit Value Temporal Locality through Physical Register Reuse and Unification
- Reuse and Unification Stephan Jourdan, Ronny Ronen, Michael Bekerman, Bishara Shomar, and Adi Yoaz Intel
- Cited by 57 (7 self) – Add To MetaCart
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Early Load Address Resolution Via Register Tracking
- , Freddy Gabbay 3 , Stephan Jourdan 2 , Maxim Kalaev 2 and Ronny Ronen 2 Higher microprocessor frequencies
- Cited by 25 (1 self) – Add To MetaCart
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eXtended Block Cache
- Ronen Abstract This paper describes a new instruction-supply mechanism, called the eXtended Block Cache
- Cited by 5 (2 self) – Add To MetaCart
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Silence is Golden?
- Silence is Golden? Adi Yoaz† Ronny Ronen† Robert S. Chappell‡ Yoav Almog† †Intel Corporation
- Cited by 9 (0 self) – Add To MetaCart
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Correlated Load-Address Predictors
- Abstract Correlated Load-Address Predictors Michael Bekerman, Stephan Jourdan, Ronny Ronen, Gilad
- Cited by 31 (1 self) – Add To MetaCart
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Coming challenges in microarchitecture and architecture
- Coming Challenges in Microarchitecture and Architecture RONNY RONEN, SENIOR MEMBER, IEEE, AVI
- Cited by 10 (0 self) – Add To MetaCart
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eXtended Block Cache
- Ronen Abstract This paper describes a new instruction-supply mechanism, called the eXtended Block Cache
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