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Searching for authors named "Ronny Krashinsky" – sorted by Relevance.

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  • GRAPE: Genetic Routing And Placement Engine  
  • by Ronny Krashinsky — 2000
  • …Traditional VLSI systems automatically place and route circuits using two independent steps; first an optimal placement is determined by using wire length estimates, then an optimal routing is attempted for the given placement. In actuality, placement and routing can have complicated interactions, a…
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  • Efficient Web Browsing for Mobile Clients using HTTP Compression  
  • by Ronny Krashinsky — 2000
  • …Efficient web browsing on mobile computers presents a unique challenge. These machines are different from other classes of client computers since they have relatively lowbandwidth connections and they are battery-powered and therefore limited by their energy consumption. However, they tend to intera…
  • Cited by 7 (0 self)Add To MetaCart
  • Maintaining Performance while Saving Energy on Wireless LANs  
  • by Ronny Krashinsky — 2001
  • …Minimizing the energy consumption of wireless network interfaces is crucial in the design of battery-powered mobile computing devices. The IEEE 802.11 wireless LAN specification describes a power-saving mode which allows the network interface on the mobile device to enter a sleep mode when the link …
  • Cited by 1 (0 self)Add To MetaCart
  • Minimizing Energy for Wireless Web Access with Bounded Slowdown  
  • by Ronny Krashinsky, Hari Balakrishnan — 2002
  • …On many battery-powered mobile computing devices, the wireless network is a significant contributor to the total energy consumption. In this paper, we investigate the interaction between energy-saving protocols and TCP performance for Web-like transfers. We show that the popular IEEE 802.11 power-sa…
  • Cited by 81 (1 self)Add To MetaCart
  • Cache Refill/Access Decoupling for Vector Machines  
  • by Christopher Batten, Ronny Krashinsky, Steve Gerding, Krste Asanovic — 2004 — In MICRO 37: Proceedings of the 37th annual IEEE/ACM International Symposium on Microarchitecture
  • …Vector processors often use a cache to exploit temporal locality and reduce memory bandwidth demands, but then require expensive logic to track large numbers of outstanding cache misses to sustain peak bandwidth from memory. We present refill/access decoupling, which augments the vector processor …
  • Cited by 6 (3 self)Add To MetaCart
  • SyCHOSys: Compiled Energy-Performance Cycle Simulation  
  • by Ronny Krashinsky, Seongmoo Heo, Michael Zhang, Krste Asanovic — 2000
  • …SyCHOSys (Synchronous Circuit Hardware Orchestration System) generates high-speed energy-performancecycle simulators by compiling a processor description into efficient C++ code. This framework can custom compile a cycle simulator with arbitrary mixed levels of simulation detail ranging from gate-le…
  • Cited by 4 (4 self)Add To MetaCart
  • Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy  
  • by Seongmoo Heo, Ronny Krashinsky, Krste Asanovic — 2001 — In 19th Conference on Advanced Research in VLSI
  • …This work presents new techniques to evaluate the energy and delay of flip-flop and latch designs and shows that no single existing design performs well across the wide range of operating regimes present in complex systems. We propose the use of a selection of flipflop and latch designs, each tuned …
  • Cited by 12 (5 self)Add To MetaCart
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