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67 documents found, showing 1 through 10. Next 10 →

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Random pattern testable logic synthesis
by Chen-huan Chiang, Eep K. Gupta — 1994 — Proc. of International Conference on Computer-Aided Design (ICCAD
…Random Pattern Testable Logic Synthesis Chen-Huan Chiang and Sandeep K. Gupta University…
Cited by 13 (0 self) – Add To MetaCart

Designing Asynchronous Sequential Circuits For Random Pattern Testability
by O. A. Petlin, S. B. Furber, A. M. Romankevich, V. V. Groll — 1995 — IEE Proceedings, Part E, Computers and Digital Techniques
…DESIGNING ASYNCHRONOUS SEQUENTIAL CIRCUITS FOR RANDOM PATTERN TESTABILITY O. A. Petlin, S. B…
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Automated Logic Synthesis of Random Pattern Testable Circuits
by Nur A. Touba, Edward J. Mccluskey — 1994 — Proc. of International Test Conference
…AUTOMATED LOGIC SYNTHESIS OF RANDOM PATTERN TESTABLE CIRCUITS Nur A. Touba and Edward J. Mc…
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RP-SYN: Synthesis of Random Pattern Testable Circuits with Test Point Insertion
by Nur A. Touba, Edward J. Mccluskey — 1999
…-SYN, is described for synthesizing random pattern testable circuits. RP-SYN takes as an input a two…
Cited by 3 (0 self) – Add To MetaCart

c ○ 2000 Kluwer Academic Publishers. Manufactured in The Netherlands. On Random Pattern Testability
by A. Schubert, W. Anheier, C. Landrault — 1999
… Publishers. Manufactured in The Netherlands. On Random Pattern Testability of Cryptographic VLSI Cores A…
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LOT: Logic Optimization with Testability - New Transformations for Logic Synthesis
by Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz — 1998
… optimizes its area while simultaneously enhancing its random pattern testability. The method is based…
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Test Point Insertion For Non-Feedback Bridging Faults
by Nur A. Touba, Nur A. Touba, Edward J. Mccluskey, Edward J. Mccluskey — 1996
… pattern testing of bridging faults. Although bridging faults are generally more random pattern testable…
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BETSY: Synthesizing Circuits for a Specified BIST Environment
by Zhe Zhao, Bahram Pouya, Nur A. Touba — 1998 — in Proc. Int. Test Conf
… pattern generator (by maximizing its random pattern testability), the circuit is optimized for a specific…
Cited by 3 (1 self) – Add To MetaCart

Technology-dependent Transformations For Low-power Synthesis
by Rajendran Panda, Farid N. Najm — 1997
… pattern testability of the circuits is studied. 1. Introduction Power reduction has become an important…
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Mixed-Mode Bist Using Embedded Processors
by Sybille Hellebrand, Hans-joachim Wunderlich, Andre Hertwig — 1996
… are not completely random pattern testable, the test programs have to generate deterministic patterns after random…
Cited by 25 (5 self) – Add To MetaCart

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