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Proposal of a Timing Model for CMOS Logic Gates Driving a CRC pi Load
by Akio Hirata, Hidetoshi Onodera, Keikichi Tamaru — 1998 — IEEE/ACM International Conference on Computer−Aided Design
…Proposal of a Timing Model for CMOS Logic Gates Driving a CRC �� Load Akio Hirata, Hidetoshi…
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