Searching for "PROMPT a mapping environment for telecom applications on "system-on-a-chip"." – sorted by Relevance.
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PROMPT: A Mapping Environment for Telecom Applications on "System-On-a-Chip"
- PROMPT: A Mapping Environment for Telecom Applications on "System-On-a-Chip" Michel Barreteau
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System-on-a-chip
- System-on-a-chip From Wikipedia, the free encyclopedia Jump to: navigation, search System-on-a-chip
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The System-on-a-Chip Lock Cache
- technique that is easily applicable to a shared-memory multiprocessor System-on-a-Chip (SoC). Our solution
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System-on-a-Chip Processor Synchronization
- System-on-a-Chip Processor Synchronization Support in Hardware Bilge E. Saglam Vincent J. Mooney
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Embedded Model Predictive Control for System-on-a-Chip Applications
- EMBEDDED MODEL PREDICTIVE CONTROL FOR SYSTEM-ON-A-CHIP APPLICATIONS Leonidas G. Bleris
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Optimal Test Access Architectures for System-on-a-Chip
- Optimal Test Access Architectures for System-on-a-Chip KRISHNENDU CHAKRABARTY Duke University Test
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SYSTEM-ON-A-CHIP (SOC) VERIFICATION METHODS
- SYSTEM-ON-A-CHIP (SOC) VERIFICATION METHODS December 6th, 2003 Morgan Chen E-mail: mjchen
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ERROR CONTAINMENT IN THE TIME- TRIGGERED SYSTEM-ON-A-CHIP ARCHITECTURE
- ERROR CONTAINMENT IN THE TIME- TRIGGERED SYSTEM-ON-A-CHIP ARCHITECTURE R. Obermaisser, H. Kopetz
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Synthesis of Transparent Circuits for Hierarchical and System-on-a-Chip Test
- Synthesis of Transparent Circuits for Hierarchical and System-on-a-Chip Test 1 Krishnendu
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System-on-a-Chip - A Platform Perspective
- Biography System-on-a-Chip - A Platform Perspective Jan M. Rabaey and Alberto Sangiovanni
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