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Searching for "On Distributed Fault Simulation." – sorted by Relevance.

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11 documents found, showing 1 through 10. Next 10 →

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ATPG Program ABSTRACT
by K. Han
… purpose system for distributed computing using MPI. HITEC/PROOFS, an existing fault simulation and test…
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Data Parallel Fault Simulation
by Minesh B. Amin, Bapiraju Vinnakota — 1995 — Proceedings ICCD
… ratio characterizes the distribution of computational activity in fault simulation. We present…
Cited by 1 (1 self) – Add To MetaCart

A Portable ATPG tool for Parallel and Distributed Systems
by Corno Prinetto, F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda, E. Veiluva — Proc. VLSI Test Symp
… are considered, and their possible detection is investigated. By distributing the fault simulation task among…
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A Portable ATPG tool for Parallel and Distributed Systems
by Corno Prinetto Rebaudengo, F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda, E. Veiluva — Proc. VLSI Test Symp
… are considered, and their possible detection is investigated. By distributing the fault simulation task among…
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Exploiting Competing Subpopulations for Automatic Generation of Test Sequences for Digital Circuits
by Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda — 1996 — In Proceedings of the Fourth International Conference on Parallel Problem Solving from Nature
…, and the tasks distributed to the slaves amounts to simulating a sequence on different subsets of faults. Several…
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Software Fault Injection Testing
by Supervisor Mattias Rimbark, Examinator Axel Jantsch, Robert Thorhuus, Roger Nordmark, Mattias Rimbark, Björn Wirén, Ericsson Telecom, Älvsjö Robert Thorhuus — 2000
… Analysis (EPA) 34 5.2.2 Distributed Fault Simulation 36 5.2.3 Program Couter Fault Simulation 36 5…
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Sequential circuit fault simulation using logic emulation
by Shih-arn Hwang, Jin-hua Hong, Student Member, Cheng-wen Wu, Senior Member — 1998 — IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume
…]–[9], which simulate several faults simultaneously by grouping them into a packet; and 3) distributed fault…
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Exploiting a Workstation Network for Automatic Generation of Test Patterns for Digital Circuits
by Corno Prinetto Rebaudengo, F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda, A. R. Meo, E. Veiluva, Centro Supercalcolo Piemonte
…-based approach, in which the results coming from a fault simulator are exploited [ACAgr88] [CCPS92] [HIHH92…
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GATTO: an Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits
by P. Prinetto, M. Rebaudengo, M. Sonza Reorda, M. Sonza, E. Veiluva, Politecnico Di Torino — 1994 — In Proceedings of the International Conference on Tools with Artificial Intelligence
… network has been effectively exploited to tackle the problem, by distributing the fault simulation task…
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GATTO: an Intelligent Tool for Automatic Test Pattern Generation for Digital Circuits
by Prinetto Rebaudengo Sonza, P. Prinetto, M. Rebaudengo, M. Sonza, Reorda E. Veiluva, Politecnico Di Torino — 1994 — In Proceedings of the International Conference on Tools with Artificial Intelligence
… network has been effectively exploited to tackle the problem, by distributing the fault simulation task…
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