Searching for authors named "Oliver Schliebusch" – sorted by Relevance.
-
33-1 A F&mework for Automated and Optimized ASIP Implementation Supporting Multiple Hardware Description Languages
- Description Languages Oliver Schliebusch, A. Chattopadhyay, D. Kammler, G. Ascheid, R. Leupers, H. Meyr Aachen
- Add To MetaCart
-
RTL Processor Synthesis for Architecture Exploration and Implementation
- RTL Processor Synthesis for Architecture Exploration and Implementation Oliver Schliebusch, A
- Cited by 2 (1 self) – Add To MetaCart
-
A Universal Technique for Fast and Flexible Instruction-Set Architecture Simulation
- Nohl, Gunnar Braun, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr Integrated Signal Processing
- Cited by 23 (4 self) – Add To MetaCart
-
Processor/Memory Co-Exploration on Multiple Abstraction Levels
- Oliver Schliebusch, Rainer Leupers, Heinrich Meyr Integrated Signal Processing Systems Templergraben 55
- Add To MetaCart
-
A Novel Methodology for the Design of Application-Specific Instruction-Set Processors (ASIPs) Using a Machine Description Language
- , Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, and Heinrich Meyr, Fellow, IEEE
- Cited by 11 (0 self) – Add To MetaCart

