Searching for authors named "Oguz Ergin" – sorted by Relevance.
-
Register packing: Exploiting narrow-width operands for reducing register file pressure
- Register Packing: Exploiting Narrow-Width Operands for Reducing Register File Pressure Oguz Ergin
- Cited by 15 (4 self) – Add To MetaCart
-
Reducing the Power Dissipation of Register Alias Tables in High–Performance Processors *
- Kucuk 1 , Oguz Ergin 2 , Dmitry Ponomarev 3 , Kanad Ghose 3 1 Department of Computer Engineering
- Add To MetaCart
-
Selective Writeback: Improving Processor Performance and Energy Efficiency
- in the branch resolution loop negatively affects the overall * Oguz Ergin is currently with Intel Labs Barcelona
- Cited by 2 (1 self) – Add To MetaCart
-
Distributed Reorder Buffer Schemes for Low Power
- Distributed Reorder Buffer Schemes for Low Power Gurhan Kucuk Oguz Ergin Dmitry Ponomarev Kanad Ghose
- Cited by 3 (1 self) – Add To MetaCart
-
Reducing Datapath Energy Through the Isolation of Short-Lived Operands
- Ponomarev Gurhan Kucuk Oguz Ergin Kanad Ghose Department of Computer Science State University of New York
- Cited by 13 (10 self) – Add To MetaCart
-
A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors
- –Performance Microprocessors Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev Department of Computer Science State
- Cited by 8 (7 self) – Add To MetaCart
-
Increasing processor performance through early register release
- Increasing Processor Performance Through Early Register Release Oguz Ergin, Deniz Balkan, Dmitry
- Cited by 17 (4 self) – Add To MetaCart
-
Exploiting Narrow Values for Soft Error Tolerance
- . Index Terms—Error Correction, Soft Errors, Narrow Values, Data Cache A Oguz Ergin 1* , Osman Unsal 2
- Cited by 3 (1 self) – Add To MetaCart
-
Isolating short-lived operands for energy reduction
- for Energy Reduction Dmitry Ponomarev, Member, IEEE, Gurhan Kucuk, Student Member, IEEE, Oguz Ergin, Student
- Cited by 3 (1 self) – Add To MetaCart
-
Fuse: A technique to anticipate failures due to degradation in ALUs
- , Osman Unsal † , Oguz Ergin ‡ , Antonio González Intel Barcelona Research Center, Intel Labs – UPC
- Cited by 1 (0 self) – Add To MetaCart

