Searching for authors named "Mustafa Celik" – sorted by Relevance.
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Min/max on-chip inductance models and delay metrics
- Stanford, CA 94309 yichanglu@(email omitted); Mustafa Celik Monterey Design Systems 894 Ross Dr. Sunnyvale, CA
- Cited by 2 (0 self) – Add To MetaCart
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SPIE: Sparse Partial Inductance Extraction
- Extraction + Zhijiang He, Mustafa Celik and Lawrence Pileggi Department of Electrical and Computer
- Cited by 14 (2 self) – Add To MetaCart
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S2P: A Stable 2-Pole RC Delay and Coupling Noise Metric
- , Mustafa Celik 2 , and Lawrence T.Pileggi Department of Electrical and Computer Engineering Carnegie
- Cited by 3 (0 self) – Add To MetaCart
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A Fast Analytical Technique for Estimating the Bounds of On-Chip Clock Wire Inductance
- Yi-Chang Lu, Kaustav Banerjee, Mustafa Celik*, Robert W. Dutton Center for Integrated Systems
- Cited by 7 (1 self) – Add To MetaCart
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Defining Statistical Sensitivity for Timing Optimization of Logic Circuits with Large-Scale Process and Environmental Variations
- -Scale Process and Environmental Variations * Xin Li 1 , Jiayong Le 1 , Mustafa Celik 1 and Lawrence T. Pileggi 2
- Cited by 13 (1 self) – Add To MetaCart

