Searching for authors named "Masanori Hashimoto" – sorted by Relevance.
10 documents found, showing 1 through 10.
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Performance Prediction ofOn-chip High-throughput Global Signaling
- …Performance Prediction ofOn-chip High-throughput Global Signaling Masanori HASHIMOTO1'2, Akira…
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A Performance Optimization Method by Gate Sizing Using Statistical Static Timing Analysis
- …A Performance Optimization Method by Gate Sizing using Statistical Static Timing Analysis Masanori…
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Increase in delay uncertainty by performance optimization
- …INCREASE IN DELAY UNCERTAINTY BY PERFORMANCE OPTIMIZATION Masanori Hashimoto Hidetoshi Onodera…
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A Power and DdH y Optimization Method Using Input Reordering in Cell-Based CMOS Circuits
- … Optimization Method Using Input Reordering in Cell-Based CMOS Circuits Masanori HASHIMOTO + , Student Member…
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Design Guideline for Resistive Termination of On-Chip High-Speed Interconnects
- … ∗ , Masanori Hashimoto † and Hidetoshi Onodera ∗ ∗ Kyoto University, Kyoto, Kyoto 606-8501, JAPAN, † Osaka…
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Abstract Substrate Loss of On-chip Transmission-lines with Power/Ground Wires in Lower Layer
- … Tsuchiya 1 , Masanori Hashimoto 2,3 , and Hidetoshi Onodera 1 1 Dept. CCE, Kyoto University, 2 Dept. ISE…
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Crosstalk Noise Estimation for Generic RC Trees
- …Crosstalk Noise Estimation for Generic RC Trees Masao Takahashi Masanori Hashimoto Hidetoshi…
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Equivalent waveform propagation for static timing analysis
- …, APRIL 2004 Equivalent Waveform Propagation for Static Timing Analysis Masanori Hashimoto, Member, IEEE…
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Timing Analysis Considering Spatial Power/Ground Level Variation
- …TIMING ANALYSIS CONSIDERING SPATIAL POWER/GROUND LEVEL VARIATION Masanori Hashimoto, Junji…
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A Performance Comparison of PLLs for Clock Generation Using Ring Oscillator
- … in a Digital CMOS Process Takahito MIYAZAKI y Masanori HASHIMOTO y�yy Hidetoshi ONODERA y y Dept…
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Showing 1 through 10.
