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Logical effort based design exploration of 64-bit adders using a mixed dynamic-CMOS/thresholdlogic
by Peter Celinski, Said Al-sarawi, Derek Abbott, Centre High, Performance Integrated — 2004 — Proc. Annual Symp. VLSI ISVLSI’04
…Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic…
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