Searching for authors named "Lasse Natvig" – sorted by Relevance.
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Simulating Parallel Architectures with BSPlab
- Simulating Parallel Architectures with BSPlab Lasse Natvig Dept. of Computer and Information
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Computational Models For Parallel Computing and BSPlab
- Page 1 COMPUTATIONAL MODELS FOR PARALLEL COMPUTINGAND BSPLAB Lasse Natvig Group for Computer
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Logarithmic Time Cost Optimal Parallel Sorting is Not Yet Fast in Practice!
- Logarithmic Time Cost Optimal Parallel Sorting is Not Yet Fast in Practice! Lasse Natvig Division
- Cited by 11 (3 self) – Add To MetaCart
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High-level Architectural Simulation of the Torus Routing Chip
- ##%%########################Heqi###yp#$# High-level Architectural Simulation of the Torus Routing Chip Lasse Natvig * Department of Computer
- Cited by 5 (2 self) – Add To MetaCart
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Why Computational Science and Engineering Should be of Interest to Computer Scientists
- Natvig Group for Computer Architecture and Design, Department of Computer Systems and Telematics
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Master-slave tasking on asymmetric networks
- , and Lasse Natvig 1 1 Norwegian University of Science and Technology, NO-7491 Trondheim, Norway {Cyril
- Cited by 1 (1 self) – Add To MetaCart
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A Cache-Partition Aware Replacement Policy for Chip Multiprocessors
- Stenström 2 Lasse Natvig 1 1 Dept. of Computer and Information Science,Norwegian University of Science
- Cited by 6 (1 self) – Add To MetaCart
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Norges teknisk- Fakultet for naturvitenskapelige universitet fysikk, informatikk og matematikk NTNU Institutt for datateknikk
- 16 th January 1998 NO. OF PAGES 16 PROJECT BSPlab AUTHOR Lasse Natvig ABSTRACT A major
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Experience from a New Course on Digital Logic and
- Natvig Department of Computer and Information Science, Norwegian University of Science and Technology
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