Searching for authors named "Kozo Kinoshita" – sorted by Relevance.
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Power Estimation And Reduction Of Cmos Circuits Considering Gate Delay
- of CMOS Circuits Considering Gate Delay Hiroaki UEDA + and Kozo KINOSHITA ++ , Members IEICE TRANS
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On Per-Test Fault Diagnosis Using the X-Fault Model
- Kajihara 1 , Laung-Terng (L.-T.) Wang 2 , Kewal K. Saluja 3 , and Kozo Kinoshita 4 1 Dept. of CSE, Kyushu
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