Searching for authors named "Kiyoung Choi" – sorted by Relevance.
-
Optimizing Timed Cosimulation by Hybrid Synchronization
- this paper, we present an approach to improving the performance of timed cosimulation. Our approach applies optimistic simulation concept to timed cosimulation for the reduction of synchronization overhead. It consists of (1) a predictive method for the synchronization between optimistic and synchro
- Cited by 3 (2 self) – Add To MetaCart
-
Narrow Bus Encoding for Low Power Systems
- Bus Encoding for Low Power Systems Youngsoo Shin and Kiyoung Choi School of Electrical Engineering
- Cited by 2 (1 self) – Add To MetaCart
-
Thread-Based Software Synthesis for Embedded System Design
- by overlapping execution of Youngsoo Shin Kiyoung Choi Department of Electronics Engineering Seoul National
- Cited by 3 (2 self) – Add To MetaCart
-
Optimistic Timed HW-SW Cosimulation
- Optimistic Timed HW-SW Cosimulation Sungjoo Yoo Kiyoung Choi School of Electrical Engineering
- Cited by 4 (2 self) – Add To MetaCart
-
Synchronization Overhead Reduction in Timed Cosimulation
- Synchronization Overhead Reduction in Timed Cosimulation Sungjoo Yoo Kiyoung Choi School
- Cited by 4 (2 self) – Add To MetaCart
-
VHDL Simulation Acceleration Using Specialized Functions
- VHDL Simulation Acceleration Using Specialized Functions Taekyoon Ahn and Kiyoung Choi School
- Cited by 2 (2 self) – Add To MetaCart
-
Loop Pipelining in Hardware-Software Partitioning
- Loop Pipelining in Hardware-Software Partitioning Jinhwan Jeon and Kiyoung Choi School
- Cited by 3 (0 self) – Add To MetaCart
-
Low Power High Level Synthesis By Increasing Data Correlation
- Engineering Seoul 151-742, Korea speanut@(email omitted); Kiyoung Choi School of Electrical Engineering Seoul
- Cited by 4 (1 self) – Add To MetaCart
-
Software Synthesis through Task Decomposition by Dependency Analysis
- Software Synthesis through Task Decomposition by Dependency Analysis Youngsoo Shin Kiyoung Choi
- Cited by 7 (6 self) – Add To MetaCart
-
Power-conscious High Level Synthesis Using Loop Folding
- Kim Kiyoung Choi School of Electrical Engineering Seoul National University, Seoul, Korea, 151-742 E
- Cited by 4 (1 self) – Add To MetaCart

