Searching for authors named "Jia Di" – sorted by Relevance.
4 documents found, showing 1 through 4.
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Object Management Group. corba/iiop 2.4 speci http://www.omg.org
- …ABSTRACT Power-aware Pipelined Multiplier Design Based On 2-Dimensional Pipeline Gating Jia Di, J…
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A Hardware Threat Modeling Concept for Trustable Integrated Circuits
- …A Hardware Threat Modeling Concept for Trustable Integrated Circuits Jia Di 1 and Scott Smith 2 1…
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High Throughput Pow Er-Aw Are Fir Filter Design Based On Fine-Grain Pipelining Multipliers And Adders
- … be achieved by carefully balancing the pipeline stages. Figure 1 shows a pipelining scheme for FIR filter. Jia…
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R.F.DeMara, Improving power-awareness of pipelined array multipliers using 2-dimensional pipeline gating and its application to fir design. Integration, the VLSI J. (2005), Vol.38. Dhireesha Kudithipudi Dhireesha Kudithipudi received her M.S. degree in co
- … and its Application on FIR Design Jia Di, J. S. Yuan and R. DeMara School of Electrical Engineering…
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