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Interface Design for Rationally Clocked GALS Systems
by Joycee Mekie, Supratik Chakraborty, Girish Venkataramani, P. S. Thiagarajan, D. K. Sharma — 2006 — in Proceedings of IEEE International Symposium on Asynchronous Circuits and Systems
…Interface Design for Rationally Clocked GALS Systems Joycee Mekie 1 Supratik Chakraborty 1 Girish…
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Thesis: A Compiler Framework for Mapping Applications to a Coarse-grained Reconfigurable Architecture
by Girish Venkataramani, Advisor Seth, C. Goldstein, Advisor Walid Najjar — 2000
… for designing interface circuitry between clock domains in a GALS architecture. University of California…
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