Searching for authors named "Ilya Issenin" – sorted by Relevance.
12 documents found, showing 1 through 10.
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Data Reuse Driven Energy-Aware MPSoC Co-Synthesis of Memory and Communication Architecture for Streaming Applications
- … for Streaming Applications * Ilya Issenin University of California, Irvine, CA 92697 isse.@ ics.uci.edu ABSTRACT…
- Cited by 4 (3 self) – Add To MetaCart
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Foray-gen: Automatic generation of affine functions for memory optimizations
- …FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations * Ilya Issenin, Nikil…
- Cited by 7 (5 self) – Add To MetaCart
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TABLE OF CONTENTS
- … for the degree of DOCTOR OF PHILOSOPHY in Information and Computer Science by Ilya Michailovich Issenin 2007…
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Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection ∗
- … ∗ Kyoungwoo Lee1 , Aviral Shrivastava2 , Ilya Issenin1 , Nikil Dutt1 , and Nalini Venkatasubramanian1 1…
- Cited by 2 (2 self) – Add To MetaCart
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Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
- …Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies * Ilya Issenin 1 , Erik…
- Cited by 15 (3 self) – Add To MetaCart
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DRDU: A Data Reuse Analysis Technique for Efficient Scratch-Pad Memory Management
- …DRDU: A Data Reuse Analysis Technique for Efficient Scratch-Pad Memory Management ILYA ISSENIN…
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Profile-based dynamic voltage scheduling using program checkpoints
- …Profile-based Dynamic Voltage Scheduling using Program Checkpoints Ana Azevedo, Ilya Issenin, Radu…
- Cited by 43 (2 self) – Add To MetaCart
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Architectural and Compiler Strategies for Dynamic Power Management in the COPPER Project
- … Azevedo, Radu Cornea, Ilya Issenin, Rajesh Gupta, Nikil Dutt, Alex Nicolau, Alex Veidenbaum Center…
- Cited by 8 (3 self) – Add To MetaCart
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Compiler Driven Data Layout Optimization for Regular/Irregular Array Access Patterns
- … of Information and Computer Science University of California, Irvine sudeep@(email omitted); Ilya Issenin Department…
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Data-Reuse-Driven Energy-Aware Cosynthesis of Scratch Pad Memory and Hierarchical Bus-Based Communication Architecture for Multiprocessor Streaming Applications
- …-Based Communication Architecture for Multiprocessor Streaming Applications Ilya Issenin, Member, IEEE, Erik Brockmeyer…
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