Searching for "High-level design validation and test." – sorted by Relevance.
-
SpotLight: Best-First Search of FSM State Space
- Submitted to IEEE International High Level Design Validation and Test Workshop, Topic: High Level
- Cited by 7 (1 self) – Add To MetaCart
-
Cv
- . Lahiri, Carl Pixley, Ken Albin. In Proc. IEEE High Level Design Validation and Test (HLDVT) Workshop, Nov
- Add To MetaCart
-
Validation of Synthesized Register-Transfer Level Designs Using Simulation and Formal Verification
- Validation and Test Workshop (HLDVT), November 1996 1 Introduction As high-level synthesis systems become
- Add To MetaCart
-
High-Level Design and Validation of ATM Switch
- High-Level Design and Validation of ATM Switch (appears in proceedings of IEEE International High
- Cited by 5 (0 self) – Add To MetaCart
-
High-Level Design Verification of Microprocessors via Error Modeling
- International High-Level Design Validation and Test Workshop, 1997, pp. 194-201. Design Error model Fault model
- Cited by 19 (7 self) – Add To MetaCart
-
High-Level Test Generation for Design Verification of Pipelined Microprocessors
- Digest of papers: 3 rd IEEE Int. High Level Design Validation and Test Workshop, La Jolla CA
- Cited by 7 (0 self) – Add To MetaCart
-
Requirements Engineering Journal
- and co-validation using the SCR method. In Proceedings of the IEEE International High Level Design
- Add To MetaCart
-
Hardware/Software Co-Design and Co-Validation Using the SCR Method
- Level Design Validation and Test Workshop (HLDVT'99), Nov 1999 Ramesh Bharadwaj and Constance Heitmeyer
- Cited by 4 (2 self) – Add To MetaCart
-
Techniques and Patterns for Safe and Efficient Real-Time Middleware
- International High Level Design, Validation and Testing Workshop, October 2002, Cannes, France. 7. M. Mousavi, G
- Cited by 2 (0 self) – Add To MetaCart
-
Microprocessor Simulators:
- (PAID) # Intl. Workshop on Microprocessor Test and Verification # Intl. High Level Design Validation
- Add To MetaCart

