Searching for "High-Level Synthesis of Digital Circuits." – sorted by Relevance.
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Relative Scheduling under Timing Constraints: Algorithms for High Level Synthesis of Digital
- Relative Scheduling under Timing Constraints: Algorithms High-Level Synthesis of Digital Circuits
- Cited by 50 (9 self) – Add To MetaCart
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Dynamically Increasing the Scope of Code Motions during the High-Level Synthesis of Digital
- Dynamically increasing the scope of code motions during the high-level synthesis of digital
- Cited by 2 (2 self) – Add To MetaCart
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Coordinated Parallelizing Compiler Optimizations and High-Level Synthesis
- in high level synthesis of digital circuits from behavioral descriptions both in the industry
- Cited by 9 (3 self) – Add To MetaCart
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Rapid Prototyping of Microelectronic Systems
- " [Mur91] (Vol. 32) and "High-Level Synthesis of Digital Circuits" [Mic93] (Vol. 37) present low-level
- Cited by 3 (1 self) – Add To MetaCart
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Schedulability-Driven Partitioning of Heterogeneous Real-Time Systems
- of high-level synthesis of digital circuits [46], parts of the same behavioural description can nowadays
- Cited by 3 (2 self) – Add To MetaCart
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Energy and Transient Power Minimization during Behavioral Synthesis
- for selected high-level synthesis benchmark circuits under different con- straints indicate that significant
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