Searching for authors named "Grigorios Magklis" – sorted by Relevance.
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Memory Behavior of the UAV Application
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Frontend Frequency-Voltage Adaptation for Optimal Energy-Delay 2
- In this paper we present a clustered, multiple-clock domain (CMCD) microarchitecture that combines the benefits of both clustering and Globally Asynchronous Locally Synchronous (GALS) designs. We also present a mechanism for dynamically adapting the frequency and voltage of the frontend of the CMCD
- Cited by 2 (2 self) – Add To MetaCart
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Independent front-end and back-end dynamic voltage scaling for a gals microarchitecture
- In recent years, Globally Asynchronous Locally Synchronous (GALS) designs and dynamic voltage scaling (DVS) have emerged as some of the most popular approaches to address the ever increasing microprocessor energy consumption. In this work, we propose two on-line algorithms for adjusting dynamically,
- Cited by 3 (1 self) – Add To MetaCart
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Distributing the Frontend for Temperature Reduction
- Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the heat generated, and the performance impact of dealing with thermal emergencies. So far microarchitectural techniques to co
- Cited by 11 (2 self) – Add To MetaCart
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Improving Application Performance by Dynamically Balancing Speed and Complexity in a GALS Microprocessor ∗
- Microprocessors are traditionally designed to provide “best overall ” performance across a wide range of applications and operating environments. Several groups have proposed hardware techniques that save energy by “downsizing ” hardware resources that are underutilized by particular applications. W
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Meeting Points: Using Thread Criticality to Adapt Multicore Hardware to Parallel Regions
- We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with the longest completion time in the parallel region. Knowing the criticality of each thread has many potential applicatio
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Improving Application Performance by Dynamically Trading Frequency for Complexity in a GALS Microprocessor ∗
- Microprocessors are traditionally designed to provide “best overall ” performance across a wide range of applications and operating environments. Several groups have proposed hardware techniques that save energy by “downsizing” hardware resources that are underutilized by the current application. We
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Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor
- A Multiple Clock Domain (MCD) processor addresses the challenges of clock distribution and power dissipation by dividing a chip into several (coarse-grained) clock domains, allowing frequency and voltage to be reduced in domains that are not currently on the application’s critical path. Given a reco
- Cited by 38 (8 self) – Add To MetaCart
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Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling
- As clock frequency increases and feature size decreases, clock distribution and wire delays present a growing challenge to the designers of singly-clocked, globally synchronous systems. We describe an alternative approach, which we call a Multiple Clock Domain (MCD) processor, in which the chip is d
- Cited by 64 (12 self) – Add To MetaCart
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Dynamically trading frequency for complexity in a gals microprocessor
- Microprocessors are traditionally designed to provide “best overall ” performance across a wide range of applications and operating environments. Several groups have proposed hardware techniques that save energy by “downsizing” hardware resources that are underutilized by the current application pha
- Cited by 5 (1 self) – Add To MetaCart

