Searching for "Field Programmable Gate Array (FPGA) Circuits." – sorted by Relevance.
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Implementing Evolution of FIR-Filters Efficiently in an FPGA
- the filter as well as the evolution is implemented in a single Field programmable gate array (FPGA
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Dynamically Optimizing FPGA Applications by Monitoring Temperature and Workloads
- In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic
- Cited by 2 (2 self) – Add To MetaCart
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A tcp/ip based multidevice programming circuit
- describes a lightweight Field Programmable Gate Array (FPGA) circuit design that supports the simultaneous
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Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays,” http://bach.ece.jhu.edu/~tim/research/fpaa/mapld/mapld.html
- from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design
- Cited by 1 (0 self) – Add To MetaCart
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From UML to HDL: a Model Driven Architectural Approach to
- and generates HDL output suitable for use in Field Programmable Gate Array (FPGA) circuit design. With this tool
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Hardware Implementation of a Network of Functional Spiking Neurons with Hebbian Learning
- , in order to define an architecture with low implementation cost in field programmable gate arrays (FPGAs
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MSc in Distributed Computing Systems
- Gate Arrays (FPGA) circuits. The FPGA circuits have a slow, serial reconfigurable path
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EVOLVABLE HARDWARE IN XILINX XCR3064 CPLD
- , such as Programmable Logic Device (PLD) or Field Programmable Gate Array (FPGA). In these circuits the logic design
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A reconfigurable hardware membrane system
- ]). With the advent of Field Programmable Gate Arrays (FPGAs) [21,24], however, this question some-how took a back
- Cited by 8 (3 self) – Add To MetaCart
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Maximum common subgraph isomorphism algorithms for the matching of chemical structures
- of the MCES in the optimization of configurations of field programmable gate array (FPGA) circuits in run
- Cited by 16 (0 self) – Add To MetaCart

