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FPGA-based High Performance Page Layout Segmentation
by Nalini Ratha, Nalini K. Ratha, Anil K. Jain, Anil K. Jain, Diane T. Rover, Diane T. Rover — 1996 — In Proc. of the IEEE Great Lakes Symposium on VLSI
…FPGA-based High Performance Page Layout Segmentation Topic numbers: 8, 12 Dept. of Computer Science…
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