Searching for authors named "Erik Hagersten" – sorted by Relevance.
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Adaptive Coherence Batching for Trap-Based Memory Architectures
- Adaptive Coherence Batching for Trap-Based Memory Architectures H˚akan Zeffer and Erik Hagersten
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Exploring Processor Design Options for Java-Based Middleware
- Exploring Processor Design Options for Java-Based Middleware Martin Karlsson and Erik Hagersten
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Efficient Synchronization for Nonuniform Communication Architectures
- and Erik Hagersten Uppsala University, Department of Information Technology P.O. Box 337, SE-751 05 Uppsala
- Cited by 5 (1 self) – Add To MetaCart
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Hierarchical Backoff Locks for Nonuniform Communication Architectures
- {zoran.radovic, erik.hagersten}@(email omitted); Abstract This paper identifies node affinity as an important
- Cited by 3 (0 self) – Add To MetaCart
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A Case For Low-Complexity MP Architectures
- ABSTRACT A Case For Low-Complexity MP Architectures Håkan Zeffer and Erik Hagersten Department
- Cited by 1 (0 self) – Add To MetaCart
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Removing the Overhead from Software-Based Shared Memory
- /0011 $5.00 Zoran Radović and Erik Hagersten Uppsala University, Information Technology Department
- Cited by 10 (5 self) – Add To MetaCart
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Flexibility Implies Performance
- Flexibility Implies Performance H˚akan Zeffer, Zoran Radović, and Erik Hagersten Department
- Cited by 2 (2 self) – Add To MetaCart
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StatCache: A Probabilistic Approach toEfficient and Accurate Data Locality Analysis
- and Erik Hagersten Department of Information TechnologyUppsala University Box 337, SE-751 05 Uppsala
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Conserving Memory Bandwidth in Chip Multiprocessors with Runahead Execution
- Karlsson and Erik Hagersten ����������� ��� �� ��� � � Department ����� � of Information ��� �� Technology
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RH Lock: A Scalable Hierarchical Spin Lock
- Abstract RH Lock: A Scalable Hierarchical Spin Lock Zoran Radović and Erik Hagersten Uppsala
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