Searching for authors named "Dinesh Patil" – sorted by Relevance.
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A Heuristic Method for Statistical Digital Circuit Sizing
- , Dinesh Patil b , Mark Horowitz b a Information Systems Laboratory, Department of Electrical Engineering
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A new method for design of robust digital circuits
- A New Method for Design of Robust Digital Circuits Dinesh Patil, Sunghee Yun, Seung-Jean Kim
- Cited by 6 (1 self) – Add To MetaCart
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Architecture and Circuit Techniques for a Reconfigurable Memory Block
- , Dean Liu, Younggon Kim, Dinesh Patil, and Mark Horowitz Stanford University, Stanford, CA Different
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A heuristic for optimizing stochastic activity networks with applications to statistical digital circuit sizing
- Circuit Sizing Seung-Jean Kim 1 Stephen P. Boyd 1 Sunghee Yun 1 Dinesh D. Patil 2 Mark A. Horowitz 2
- Cited by 7 (3 self) – Add To MetaCart
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Digital Circuit Optimization via Geometric Programming
- , Seung-Jean Kim, Dinesh D. Patil, Mark A. Horowitz Department of Electrical Engineering, Stanford
- Cited by 11 (4 self) – Add To MetaCart

