Searching for "Design of Low-Power" – sorted by Relevance.
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Designing the Low-Power
- . Designing the Low-Power M•CORE TM Architecture Abstract The M•CORE microRISC architecture has been developed
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Software Design For Low Power
- 6.3. SOFTWARE DESIGN FOR LOW POWER KAUSHIK ROY AND MARK C. JOHNSON School of Electrical
- Cited by 23 (0 self) – Add To MetaCart
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Energy Recovery Design for Low-Power ASICs
- Energy Recovery Design for Low-Power ASICs Conrad H. Ziesler, Joohee Kim, and Marios C
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Designing the Low-Power M*CORE Architecture
- Designing the Low-Power M•CORE TM Architecture Jeff Scott, Lea Hwang Lee, John Arends, Bill Moyer
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On a Viterbi decoder design for low power dissipation
- with speed and area, is a major concern in VLSI design. In this thesis, we investigated a low-power design
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Design of Low Power CMOS Circuits with Energy Recovery
- Design of Low Power CMOS Circuits with Energy Recovery Xunwei Wu Institute of CAS, Ningbo Univ
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Analysis and Design of Low Power Digital Multipliers
- CARNEGIE MELLON UNIVERSITY Analysis and Design of Low Power Digital Multipliers A DISSERTATION
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The Impact of CAD on the Design of Low Power Digital Circuits
- The Impact of CAD on the Design of Low Power Digital Circuits Kurt Keutzer Peter Vanbekbergen
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Analysis and circuit design for low power programmable logic modules
- Analysis and Circuit Design for Low Power Programmable Logic Modules by Eric A. Kusse Master
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A New Adiabatic Technique For Designing Low Power Array Architectures
- A NEW ADIABATIC TECHNIQUE FOR DESIGNING LOW POWER ARRAY ARCHITECTURES 1 C.Z. Lolas, D. Soudris, I
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