Searching for authors named "Daniel Geist" – sorted by Relevance.

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9 documents found, showing 1 through 9.

Efficient Model Checking by Automated Ordering of Transition Relation Partitions
by Daniel Geist Ilan, Daniel Geist, Ilan Beer — 1994 — Sixth Conference on Computer Aided Verification (CAV'94
…Efficient Model Checking by Automated Ordering of Transition Relation Partitions Daniel Geist Ilan…
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Semi-Formal Test Generation with Genevieve
by Julia Dushina, Mike Benjamin, Daniel Geist — 2001 — In Proc. DAC
…Semi-Formal Test Generation with Genevieve Julia Dushina Mike Benjamin Daniel Geist…
Cited by 3 (0 self) – Add To MetaCart

Symbolic Localization Reduction with Reconstruction Layering and Backtracking
by Sharon Barner, Daniel Geist, Anna Gringauze — 2002 — In Proc. of Conference on Computer-Aided Verification (CAV
…, Daniel Geist and Anna Gringauze IBM Haifa Research Lab, Haifa Israel Abstract. Localization reduction…
Cited by 15 (2 self) – Add To MetaCart

Methodology and System for Practical Formal Verification of Reactive Hardware
by Ilan Beer, Shoham Ben-david, Daniel Geist, Raanan Gewirtzmann, Michael Yoeli — 1994 — In Proc. 6th Conference on Computer Aided Verification, volume 818 of Lecture Notes in Computer Science
… Ben-David, Daniel Geist, Raanan Gewirtzman and Michael Yoeli IBM Science & Technology, Haifa, Israel…
Cited by 31 (3 self) – Add To MetaCart

Semi-Formal Test Generation for aBl47 ofIndustrial DSP JuliaDushin *, MikeBen"WUU *,DanVF Geist**
by Stmicroelect Jyjy Aztj, Julia Dushina, Mike Benjamin, Daniel Geist — 2001
…Semi-Formal Test Generation for a Block of Industrial DSP Julia Dushina*, Mike Benjamin*, Daniel…
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A methodology for the verification of a “system on chip
by Daniel Geist, Giora Biran, Tamara Arons, Yvgeny Nustov, Monica Farkas, Karen Holtz — 1999 — In Proceedings of the 36th Design Automation Conference
…A Methodology For the Verification of a “System on Chip” Daniel Geist, Giora Biran, Tamara Arons…
Cited by 5 (0 self) – Add To MetaCart

Formal Verification of a Processor's Bus Interface Unit
by Daniel Geist, Avner Landver, Avner L, Bruce W. Singer
… of a Processor's Bus Interface Unit Daniel Geist, Avner Landver VLSI Design Automation Haifa Research…
Cited by 1 (0 self) – Add To MetaCart

Coverage-Directed Test Generation Using Symbolic Techniques
by Daniel Geist Monica, Monica Farkas, Avner Landver, Yossi Lichtenstein, Shmuel Ur, Yaron Wolfsthal — 1996 — In Proceedings of the Int'l Conference on Formal Methods in CAD
…Coverage-Directed Test Generation Using Symbolic Techniques Daniel Geist Monica Farkas Avner…
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On the Effective Deployment of Functional Formal Verification
by Yael Abarbanel-vinov, Neta Aizenbud-reshef, Ilan Beer, Cindy Eisner, Daniel Geist, Tamir Heyman, Iris Reuveni, Eran Rippel, Irit Shitsevalov, Yaron Wolfsthal, Tali Yatzkar-haham — 2001 — In Proc. 7th International SPIN Workshop, LNCS 1885
… Aizenbud-Reshef, Ilan Beer, Cindy Eisner, Daniel Geist, Tamir Heyman, Iris Reuveni, Eran Rippel ? , Irit…
Cited by 3 (1 self) – Add To MetaCart

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