Searching for "Compiler-Controlled Memory." – sorted by Relevance.
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Compiler-Controlled Memory
- . ASPLOS VIII lo/98 CA.LJSA 0 1998 ACM 1~58113-107.0/98/0010...$5.00 Compiler-Controlled Memory Keith D
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LCM: Memory System Support for Parallel Language Implementation
- machines. This paper shows how a flexible, compiler-controlled memory system can help achieve good
- Cited by 35 (6 self) – Add To MetaCart
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Reducing the Impact of Spill Code
- . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2.4 Compiler-controlled memory . . . . . . . . . . . . . . . . . . . 2 2 Background 4 2
- Cited by 1 (0 self) – Add To MetaCart
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On Memory Behavior of Scalars in Embedded Multimedia Systems
- Mediabench benchmark in the performance analysis, with comments on compiler controlled memory. Burlin [7
- Cited by 5 (1 self) – Add To MetaCart
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The minimax cache: An energy-efficient framework for media processors
- memory. Cooper and Harvey [6] look at compiler-controlled memory. Their analysis includes spill memory
- Cited by 14 (3 self) – Add To MetaCart
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FlexCache: A Framework for Flexible Compiler Generated Data Caching
- the tag-memory and cache controller hardware with a compiler managed tag-like data structure, address
- Cited by 11 (1 self) – Add To MetaCart
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The Urban Experience
- Page 2 of 3 Timothy J. Harvey Presentations Compiler-Controlled Memory. Proceedings of the Eighth
- Cited by 9 (0 self) – Add To MetaCart
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SMLNJ: Intel x86 back end
- , but focuses on compiler-control memory. Besides being able to treat memory locations as registers
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HPL-PD architecture specification: Version 1.1
- capabilities visible to, and controllable by, the compiler. A case in point is the cache memory hierarchy
- Cited by 48 (6 self) – Add To MetaCart
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Reconfigurable Caches and their Application to Media Processing
- use (e.g., compiler-controlled memory). The latter would require some ISA support to indicate
- Cited by 82 (3 self) – Add To MetaCart

