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Searching for authors named "Chaitali Chakrabarti" – sorted by Relevance.

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45 documents found, showing 1 through 10. Next 10 →

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Instruction level power model of microcontrollers
by Chaitali Chakrabarti — 1999 — In IEEE International Symposium on Circuits and Systems
…INSTRUCTION LEVEL POWER MODEL OF MICROCONTROLLERS Chaitali Chakrabarti Department of Electrical…
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A DWT-Based Encoder Architecture For Symmetrically Extended Images
by Chaitali Chakrabarti — 1999 — In Proc. of the International Symposium on Circuits and Systems
…A DWT-BASED ENCODER ARCHITECTURE FOR SYMMETRICALLY EXTENDED IMAGES Chaitali Chakrabarti…
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Trading DCT/IDCT Quality for Energy Reduction in MPEG-2 Video Codecs
by Russel Henning, Chaitali Chakrabarti
… and Chaitali Chakrabarti Department of Electrical Engineering Arizona State University Tempe, AZ 85287-5706 Ph…
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Memory Design and Exploration for Low Power Embedded Systems
by Wen-tsong Shiue, Chaitali Chakrabarti — 2001 — Performance, Computing, and Communications, 2001, IEEE International Conference on. , 2001
…Memory Design and Exploration for Low Power Embedded Systems Wen-Tsong Shiue and Chaitali…
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Efficient realizations of encoders and decoders based on the 2-D Discrete Wavelet Transform
by Chaitali Chakrabarti, Clint Mumford — 1998
… Chaitali Chakrabarti and Clint Mumford Abstract--- In this paper we present architectures and scheduling…
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Architectures for Hierarchical and other Block Matching Algorithms
by Gagan Gupta, Chaitali Chakrabarti — 1995 — IEEE Transactions on Volume 5, Issue
…Architectures for Hierarchical and other Block Matching Algorithms Gagan Gupta and Chaitali…
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An Approach to Switching Activity Consideration during High-Level, Low-Power Design Space Exploration
by Russell Henning, Chaitali Chakrabarti — 2002 — IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
… OF SUGGESTED KEYWORDS. Russell Henning and Chaitali Chakrabarti IEEE Proof I. INTRODUCTION IN EARLY development…
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A new Architecture for the Viterbi decoder for code rate k/n
by H. Li, Hsiang-ling Li, Chaitali Chakrabarti — 1996 — IEEE Trans. Communications
…. : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : 17 1 A New Architecture for the Viterbi Decoder for Code Rate k=n 1 Hsiang-ling Li and Chaitali…
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A Low Power Scheduling Scheme with Resources Operating at Multiple Voltages
by Ali Manzak, Chaitali Chakrabarti — 2002
…-mail: chaitali@(email omitted);). Publisher Item Identifier S 1063-8210(02)00487-0. Ali Manzak and Chaitali Chakrabarti…
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Low-Power Scheduling with Resources Operating at Multiple Voltages
by Wen-tsong Shiue, Chaitali Chakrabarti — 2000 — IEEE Trans. on Circuits and Systems-II : Analog and Digital Signal Processing
…, Member, IEEE and Chaitali Chakrabarti, Member, IEEE Abstract—This paper presents a resource…
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