Searching for authors named "Aviral Shrivastava" – sorted by Relevance.
26 documents found, showing 1 through 10.
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energy efficient code generation exploiting reduced bitwidth instruction set architecture
- …ISA) ∗ Aviral Shrivastava Nikil Dutt Center for Embedded Computer Systems Center for Embedded Computer Systems…
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Power Reduction of Functional Units considering Temperature and Process Variations
- …, Aviral Shrivastava Compiler and Microarchitecture Laboratory School of Computing and Informatics Arizona…
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Aggregating Processor Free Time for Energy Reduction ∗
- …Aggregating Processor Free Time for Energy Reduction ∗ Aviral Shrivastava† Eugene Earlie‡ Nikil…
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Compiler-in-the-Loop ADL-driven Early Architectural Exploration ∗
- …Compiler-in-the-Loop ADL-driven Early Architectural Exploration ∗ Aviral Shrivastava† Nikil Dutt…
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Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors
- …, †Aviral Shrivastava, and Yunheung Paek Seoul National University, Korea †Arizona State University, USA…
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Robust Localization in Wireless Sensor Networks through the Revocation of Malicious Anchors
- … Satyajayant Misra † , Guoliang Xue † and Aviral Shrivastava † Abstract— In a wireless sensor network (WSN…
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A customizable compiler framework for embedded systems
- …A Customizable Compiler Framework for Embedded Systems Ashok Halambi Aviral Shrivastava Nikil Dutt…
- Cited by 9 (6 self) – Add To MetaCart
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Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection ∗
- … ∗ Kyoungwoo Lee1 , Aviral Shrivastava2 , Ilya Issenin1 , Nikil Dutt1 , and Nalini Venkatasubramanian1 1…
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Data Partitioning Techniques for Partially Protected Caches to Reduce Soft Error Induced Failures
- … Kyoungwoo Lee, Aviral Shrivastava, Nikil Dutt, and Nalini Venkatasubramanian Abstract Exponentially…
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Code Transformations for TLB Power Reduction ∗
- … Shrivastava Compiler and Microarchitecture Laboratory, Arizona State University, Tempe, AZ 85281 USA Email…
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