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Searching for authors named "Avinoam Kolodny" – sorted by Relevance.

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24 documents found, showing 1 through 10. Next 10 →

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Interconnect-power Dissipation in a Microprocessor
by Nir Magen, Avinoam Kolodny — 2004 — in Proceedings of the International Workshop on System-Level Interconnect Prediction
… Platform Group Haifa 31015, Israel (972) 48656830 nir.magen@(email omitted); Avinoam Kolodny Electrical…
Cited by 16 (2 self) – Add To MetaCart

BENoC: a Bus-Enhanced Network on-Chip
by Isask'har Walter, Israel Cidon, Avinoam Kolodny — 2007
…-Enhanced Network on-Chip Isask'har Walter, Israel Cidon and Avinoam Kolodny CCIT Report #677 December 2007…
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Routing table minimization for irregular mesh NoCs
by Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny — 2007 — in Proceedings of Design Automation and Test in Europe (DATE ’07
… and Avinoam Kolodny Electrical Engineering Department,Technion—Israel Institute of Technology,Haifa 32000…
Cited by 2 (1 self) – Add To MetaCart

QoS Architecture and Design Process for Cost Effective Networks on Chip
by Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny — 2004 — J. Systems Architecture, special issue on Networks on Chip
… Cidon, Ran Ginosar and Avinoam Kolodny Electrical Engineering Department, Technion—Israel Institute…
Cited by 1 (1 self) – Add To MetaCart

Low-Leakage Repeaters for NoC Interconnects", Special Session "Repeater Insertion for Nanometer Technologies - Timing is NOT Everything
by Arkadiy Morgenshtein, Israel Cidon, Avinoam Kolodny, Ran Ginosar — 2005 — Proc. of ISCAS
…Low-Leakage Repeaters for NoC Interconnects Arkadiy Morgenshtein, Israel Cidon, Avinoam Kolodny…
Cited by 2 (2 self) – Add To MetaCart

Optimal resizing of bus wires in layout migration
by Shay Michaely, Shmuel Wimer, Avinoam Kolodny — 2004 — Proc. ICECS 2004
…Optimal Resizing of Bus Wires in Layout Migration Shay Michaely 1 , Shmuel Wimer 2 , and Avinoam…
Cited by 2 (0 self) – Add To MetaCart

Cost Considerations in Network on Chip
by Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny — 2004 — Integration-The VLSI Journal, special issue on Network on Chip, Volume 38, Issue
…Cost considerations in Network on Chip Evgeny Bolotin, Israel Cidon, Ran Ginosar and Avinoam…
Cited by 11 (7 self) – Add To MetaCart

1 Cost considerations in Network on Chip
by Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny
…1 Cost considerations in Network on Chip Evgeny Bolotin, Israel Cidon, Ran Ginosar and Avinoam…
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QNoC: QoS architecture and design process for network on chip
by Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny — 2004 — JOURNAL OF SYSTEMS ARCHITECTURE
… Ginosar and Avinoam Kolodny Electrical Engineering Department Technion—Israel Institute of Technology…
Cited by 47 (8 self) – Add To MetaCart

Automatic hardware-efficient SoC integration by QoS network on chip
by Evgeny Bolotin, Arkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny — 2004 — In ICECS
… Morgenshtein, Israel Cidon, Ran Ginosar and Avinoam Kolodny Electrical Engineering Department, Technion…
Cited by 4 (0 self) – Add To MetaCart

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