Searching for authors named "Anshul Kumar" – sorted by Relevance.
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Optimal Clock Period for Synthesized Data Paths
- The choice of a clock period in designs with multicycle operations have a major influence on operator allocation as well as execution time. For technologies with significant interconnection delays, optimal clock period selection before/during high-level synthesis is not practical. In our approach, w
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Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
- ) 1063-9667/04 $ 20.00 © 2004 IEEE Anshul Kumar Department of Computer Science & Engineering, Indian
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Impact of Inter-cluster Communication Mechanisms on ILP in Clustered VLIW Architectures
- Anshul Kumar anshul@(email omitted); Available Instruction Level Parallelism (ILP) in applications
- Cited by 3 (1 self) – Add To MetaCart
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A New Performance Evaluation Approach for System Level Design Space Exploration
- A New Performance Evaluation Approach for System Level Design Space Exploration C.P. Joshi, Anshul
- Cited by 2 (0 self) – Add To MetaCart
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Internal Representation and Behavioural Synthesis of Control Dominated Applications
- Ellervee, Anshul Kumar 1 , Bengt Svantesson, Ahmed Hemani ESD Lab, Dept. of Electronics, Royal Institute
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Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing
- Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing Sushil Chandra Jain, Anshul Kumar
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Stochastic Battery Model for Embedded Systems
- Battery Model for Embedded Systems Venkat Rao † , Gaurav Singhal ‡ , Anshul Kumar ‡ , Nicolas
- Cited by 2 (1 self) – Add To MetaCart
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Efficient Implementation of Multiple On-chip Signature Checking
- Efficient Implementation of Multiple On-chip Signature Checking M.F. Abdulla C.P. Ravikumar Anshul
- Cited by 1 (1 self) – Add To MetaCart
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Comparing Conventional HLS with Grammar-Based Hardware Synthesis: A Case Study
- Conventional HLS with Grammar-Based Hardware Synthesis: A Case Study Johnny ��berg, Peeter, Ellervee, Anshul
- Cited by 6 (6 self) – Add To MetaCart
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Automatically Customising VLIW Architectures with Coarse Grained Application-specific Functional Units
- Units Diviya Jain 1 , Anshul Kumar 1 , Laura Pozzi 2 , and Paolo Ienne 2 1 Department of Computer
- Cited by 2 (0 self) – Add To MetaCart

