Searching for authors named "Anirudh Devgan" – sorted by Relevance.
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Wire Segmenting for Improved Buffer Insertion
- /97 Anaheim, CA, USA Charles Alpert and Anirudh Devgan IBM Austin Research Laboratory, Austin, TX 78758 Our
- Cited by 60 (8 self) – Add To MetaCart
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Parametric yield estimation considering leakage variability
- of considering both these limiters in calculating the yield of a lot. 1 Introduction Rajeev Rao, *Anirudh Devgan
- Cited by 10 (0 self) – Add To MetaCart
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An Efficient Algorithm for Statistical Minimization of Total Power under Timing Yield Constraints
- Murari Mani 1 , Anirudh Devgan 2 , and Michael Orshansky 1 ABSTRACT Power minimization under variability
- Cited by 19 (0 self) – Add To MetaCart
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D.Z.Pan, Sleep transistor sizing using timing criticality and temporal currents
- Zhang ∗ , Anirudh Devgan † and David Z. Pan ∗ ∗ Department of Electrical and Computer Engineering
- Cited by 1 (1 self) – Add To MetaCart
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Full chip leakage estimation considering power supply and temperature variations
- Su Frank Liu Anirudh Devgan Emrah Acar Sani Nassif IBM Corp. 11400 Burnet Rd. Austin, TX 78758
- Cited by 22 (3 self) – Add To MetaCart
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Characterizing the Impact of Different Memory-Intensity Levels
- Abstract Characterizing the Impact of Different Memory-Intensity Levels Ramakrishna Kotla, Anirudh
- Cited by 8 (1 self) – Add To MetaCart
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Adjoint transient sensitivity computation in piecewise linear simulation
- Adjoint Transient Sensitivity Computation in Piecewise Linear Simulation Tuyen V. Nguyen*, Anirudh
- Cited by 2 (0 self) – Add To MetaCart

