Searching for "An architecture for high instruction level parallelism." – sorted by Relevance.

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Dynamic Binary Translation and Optimization
by Kemal Ebcioglu, Erik Altman, Michael Gschwind, Senior Member, Senior Member, Sumedh Sathaye — 2001 — IEEE Transactions on Computers
…-directed feedback, instruction-level parallelism, very long instruction word architectures, virtual machines…
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