Searching for "An Automated Temporal Partitioning and Loop Fission Approach for FPGA Based Reconfigurable Synthesis of DSP Applications." – sorted by Relevance.

Order by: Citations | Year (Descending) | Year (Ascending) | Recency

Try your query at: Scholar | Yahoo! | Ask | Bing | CSB

1 documents found, showing 1 through 1.

An Automated Temporal Partitioning and Loop Fission approach for FPGA based reconfigurable
by Meenakshi Kaul, Ranga Vemuri, Sriram Govindarajan, Iyad Ouaiss — 1999 — in Proc. Design Automation Conference
…An Automated Temporal Partitioning and Loop Fission approach for FPGA based reconfigurable…
Cited by 10 (0 self) – Add To MetaCart

Showing 1 through 1.

Try your query at: Scholar | Yahoo! | Ask | Bing | CSB