Searching for "Algorithms and Parallel VLSI Architectures." – sorted by Relevance.
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Conference, 1994. [109] D. Sueur. Shell h'et'ergog`ene `a parall'elisme de donn'ees. In
- Moonen and Francky Catthoor, editors, Algorithms and Parallel VLSI Architectures, III, pages 331
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cessful. Permanent installation was not reached because of management problems. The experiment, however, gives a high chance for successful control of such processes.
- for block-regularized RLS identification", in Algorithms and Parallel VLSI Architectures, M. Moonen and F
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[226, 227, 228] and
- identification", in Algorithms and Parallel VLSI Architectures, M. Moonen and F. Cathoor, Eds., pp. 49
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Instruction-Level Parallelism In Asynchronous Processor Architectures
- and Parallel VLSI Architectures, pp 203-215, Leuven, Belgium, August 1994. c fl Elsevier Science Publishers
- Cited by 8 (6 self) – Add To MetaCart
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A Language-Oriented Approach to the Design of Systolic Chips
- and Parallel VLSI Architectures Pont-`a-Mousson, France, June 1990 This paper also appeared in the Journal
- Cited by 9 (4 self) – Add To MetaCart
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Time-Varying System Theory for Computational Networks
- and Parallel VLSI Architectures", ed. P. Quinton and Y. Robert, vol. II (1991), ch. 11, pp. 103-126. Xi+1 (c
- Cited by 14 (12 self) – Add To MetaCart

