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Searching for authors named "Achim Rettberg" – sorted by Relevance.

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10 documents found, showing 1 through 10.

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Embedded System Design based on Webservices
by Achim Rettberg, Wolfgang Thronicke — 2002
…Embedded System Design based on Webservices Achim Rettberg University Paderborn / C-LAB, 33095…
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A Fast Asynchronous Re-configurable Architecture for Multimedia Applications
by Achim Rettberg, Bernd Kleinjohann — 2001 — Proceedings of the 14th Symposium on Integrated Circuits and System Design (SBCCI 2001
…A Fast Asynchronous Re-configurable Architecture for Multimedia Applications Achim Rettberg Bernd…
Cited by 2 (2 self) – Add To MetaCart

Overview The Re-Configurable Delay-Insensitive FLYSIG 1 Architecture 2
by Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann
…Overview The Re-Configurable Delay-Insensitive FLYSIG 1 Architecture 2 Wolfram Hardt, Achim…
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A model-based approach for executable specifications on reconfigurable hardware
by Tim Schattkowsky, Wolfgang Mueller, Achim Rettberg — 1989 — Longman Scientific & Technical
…, Wolfgang Mueller, Achim Rettberg University of Paderborn/C-LAB Paderborn, Germany Abstract UML 2.0 provides…
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Using Activation Intervals for Low Power Analysis
by Achim Rettberg, Bernd Kleinjohann, Wolfram Hardt — 2000 — Proceedings of the 9 th NASA Symposium on VLSI
…Using Activation Intervals for Low Power Analysis Achim Rettberg, Bernd Kleinjohann, Wolfram Hardt…
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The Re-Configurable Delay-Insensitive FLYSIG Architecture
by Wolfram Hardt, Achim Rettberg, Bernd Kleinjohann — 1999 — in Proceedings of the Reconfigurable Architectures Workshop 1999 (RAW'99), San Juan (Puerto Rico
…The Re-Configurable Delay-Insensitive FLYSIG 1 Architecture 2 Wolfram Hardt, Achim Rettberg…
Cited by 4 (3 self) – Add To MetaCart

A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems
by Achim Rettberg, Mauro Zanella, Christophe Bobda, Thomas Lehmann — 2003 — in Proceedings of the Design Automation and Test Conference
…A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems Achim Rettberg, Mauro…
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Re-Configurable Multiplier Units of the Asynchronous FLYSIG Architecture
by Achim Rettberg, Andreas Hennig, Bernd Kleinjohann — 2002
… FLYSIG Architecture + Achim Rettberg, Andreas Hennig, Bernd Kleinjohann University Paderborn / C…
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Efficient Bit-Serial Constant Multiplication for FPGAs
by Florian Dittmann Bernd, Bernd Kleinjohann, Achim Rettberg
… Achim Rettberg University of Paderborn/C-LAB Fürstenallee 11, 33094 Paderborn, Germany Phone: +49…
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A Fully Self-Timed Bit-Serial Pipeline Architecture
by For Embedded Systems, Achim Rettberg, Mauro Zanella, Christophe Bobda, Thomas Lehmann — 2003 — in Proceedings of the Design Automation and Test Conference
…A Fully Self-Timed Bit-Serial Pipeline Architecture for Embedded Systems Achim Rettberg, Mauro…
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Showing 1 through 10.

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