MetaCart Sign in to MyCiteSeerX

Include Citations | Advanced Search | Help

Disambiguated Search | Include Citations | Advanced Search | Help

Searching for "A Method of Verification in Design." – sorted by Relevance.

Try your query at: Scholar | Yahoo! | Ask | Bing | CSB
Help! 2 documents found, showing 1 through 2.
ATOM RSS
  • Verification of UML Statechart Models of Embedded Systems  
  • by Adám Darvas, István Majzik, Balzs Beny — 2002 — In Proc. 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop (DDECS 2002), IEEE Computer Society TTTC
  • a method for verification of UML statechart models generated in the development process of embedded…
  • Cited by 1 (0 self)Add To MetaCart
Help! Showing 1 through 2.
ATOM RSS
Try your query at: Scholar | Yahoo! | Ask | Bing | CSB