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Translinear Circuits Using Subthreshold Floating-Gate MOS Transistors
- Analog Integrated Circuits and Signal Processing
, 1996
"... . We describe a family of current-mode circuits with multiple inputs and multiple outputs whose output currents are products and/or quotients of powers of the input currents. These circuits are made up of multiple-input floating-gate MOS (FGMOS) transistors operating in the subthreshold regime. The ..."
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Cited by 40 (9 self)
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. We describe a family of current-mode circuits with multiple inputs and multiple outputs whose output currents are products and/or quotients of powers of the input currents. These circuits are made up of multiple-input floating-gate MOS (FGMOS) transistors operating in the subthreshold regime
A 500-nW Floating-Gate Amplifier with Programmable Gain
"... Micro-power voltage amplification is achieved using capacitive feedback via multiple-input floating-gate transistors. The proposed amplifier uses self-biased cascode transistors operating in the subthreshold region for near rail-torail output voltage range. Simulations show a 72 kHz GBW when driving ..."
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Cited by 2 (0 self)
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Micro-power voltage amplification is achieved using capacitive feedback via multiple-input floating-gate transistors. The proposed amplifier uses self-biased cascode transistors operating in the subthreshold region for near rail-torail output voltage range. Simulations show a 72 kHz GBW when
Reducing Indirect Programming Mismatch due to Oxide-traps using Dual-channel Floating-gate Transistors
"... Abstract—This paper presents a dual-channel architecture for floating-gate transistors that can alleviate the detrimental effects of oxide-traps seen in indirect programming techniques. The proposed transistor consists of four input/output ports that allow multiple paths for drain currents to flow a ..."
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Abstract—This paper presents a dual-channel architecture for floating-gate transistors that can alleviate the detrimental effects of oxide-traps seen in indirect programming techniques. The proposed transistor consists of four input/output ports that allow multiple paths for drain currents to flow
Floating-Gate Analog Implementation of the Additive Soft-Input Soft-Output Decoding Algorithm
"... Abstract—The soft-input soft-output algorithm is used to iteratively decode concatenated codes. To efficiently implement this algorithm, an additive form in the logarithmic domain is employed. A novel analog implementation using CMOS translinear circuits is proposed. A multiple-input floating-gate C ..."
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Cited by 4 (0 self)
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Abstract—The soft-input soft-output algorithm is used to iteratively decode concatenated codes. To efficiently implement this algorithm, an additive form in the logarithmic domain is employed. A novel analog implementation using CMOS translinear circuits is proposed. A multiple-input floating-gate
TECHNOLOGY Floating-Gate Gate MOSFET Based Tunable Voltage Differencing Transconductance Amplifier and Its Application to Biquad Filters
"... Active circuit element tunable VDTA (Voltage Differencing Transconductance Amplifier) based on floating-gate gate MOSFETs is proposed in this paper. The mentioned VDTA is brought as the convenient element for current mode signal processing, which might be very suitable for variety of applications su ..."
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consists of two multiple-output output operational transconductance amplifiers (MO-OTAs) (MO using floating-gate gate MOSFETs as input stage. Two examples of biquad filters implemented using VDTA are simulated with PSOICE simulations using the 0.18.18 µm CMOS technology to confirm the good performance
Adaptive log domain filters using floating gate transistors
- in IEEE Int. Symp. Circuits Systems, May 2004
"... We present an adaptive log domain filter with integrated learning rules for model reference estimation. The system is a first order low pass filter based on a log domain topology that incorporates multiple input floating gate transistors to implement on-line learning of gain and time constant. Adapt ..."
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Cited by 3 (2 self)
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We present an adaptive log domain filter with integrated learning rules for model reference estimation. The system is a first order low pass filter based on a log domain topology that incorporates multiple input floating gate transistors to implement on-line learning of gain and time constant
A Proposition on Floating Gate Neuron MOS Macromodeling for Device Fabrications
, 1999
"... A neuron MOS transistor has a floating gate and multiple input gates... ..."
FTL based 4Stage CLA Adder Design with Floating Gates
"... Low-voltage and low-power circuit structures are substantive for almost all mobile electronic gadgets which generally have mixed mode circuit structures embedded with analog sub-sections. Using the reconfigurable logic of multi-input floating gate MOSFETs, 4-bit full adder has been designed for 1.1V ..."
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Cited by 1 (0 self)
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.1V operation. [1],[2] Multiinput floating gate (MIFG) transistors have been anticipating in realizing the increased functionality on a chip. A multi-input floating gate MOS transistor accepts multiple inputs signals, calculates the weighted sum of all input signals and then controls the ON and OFF
5TClocked Carry Look Ahead Adder Design Using
"... Abstract-- Low-voltage and low-power circuit structures are substantive for almost all mobile electronic gadgets which generally have mixed mode circuit structures embedded with analog sub-sections. Using the reconfigurable logic of multiinput floating gate MOSFETs, 4-bit full adder has been designe ..."
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designed for 1.8V operation. Multi-input floating gate (MIFG) transistors have been anticipating in realizing the increased functionality on a chip. A multi-input floating gate MOS transistor accepts[1] multiple inputs signals, calculates the weighted sum of all input signals and then controls
Results 1 - 10
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22
